1. Field of the Invention
The present invention relates the circuit design of CMOS and biCMOS circuits that contain resistors and capacitors that are actively laser trimmed. More particularly, the present invention is related to a method of manufacturing accurate CMOS and biCMOS circuits where the ratio of current over capacitance is kept constant, thereby reducing the need for active trimming procedures.
2. Description of the Prior Art
In the prior art record there are many circuits that are manufactured using CMOS and biCMOS manufacturing techniques. The use of CMOS and biCMOS in the manufacture of circuits has many known advantages. However, among the disadvantages of such manufacturing techniques is the inconsistency in performance of components made using the CMOS and biCMOS technologies. Performance inconsistencies of CMOS and biCMOS components are created by many different factors. Those factors include variations in the composition of CMOS and biCMOS materials from batch to batch. Variations are also caused by changes in the manufacturing process and changes in temperature as the components are used. The variations across process and temperature typically result in a .+-.50% uncertainty in the value of resistors made with CMOS and biCMOS technologies and a .+-.25% uncertainty in the value of capacitors.
In many circuits, the uncertainty values of CMOS and biCMOS resistors and capacitors are unacceptable. Accordingly, the resistors and capacitors are not manufactured to the exact values that are needed. Rather, the resistors and capacitors are then actively trimmed until the values of resistance and capacitance reach a desired value. CMOS and biCMOS resistors and capacitors are commonly laser trimmed. Such a procedure is expensive and time consuming. Furthermore, even after the resistors and capacitors are trimmed, only variations in process and materials have been removed. The values of resistance and capacitance still vary widely with changes in temperature. It is therefore common for trimmed CMOS and biCMOS circuits to contain precision external components in order to obtain exacting levels of performance.
A need therefore exists for a method of manufacturing certain CMOS and biCMOS circuits in a manner that does not require active trimming or the use of precision external components, yet enables the circuit to operate within exacting performance parameters. This need is met by the present invention as described and claimed below.